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Release 7.1.01i Trace H.39
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

C:/Xilinx/ISE71/bin/nt/trce.exe -ise
c:\xup\markets\plds\workshops\courses\v71_fpga_flow\labs\work\vhdl\picoblaze_clock\PicoBlaze_Clock.ise
-intstyle ise -e 3 -l 3 -s 4 -xml uart_clock uart_clock.ncd -o uart_clock.twr
uart_clock.pcf


Design file:              uart_clock.ncd
Physical constraint file: uart_clock.pcf
Device,speed:             xc3s200,-4 (PRODUCTION 1.36 2005-02-23)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Setup/Hold to clock clk
------------+------------+------------+------------------+--------+
            |  Setup to  |  Hold to   |                  |  Clock |
Source      | clk (edge) | clk (edge) |Internal Clock(s) |  Phase |
------------+------------+------------+------------------+--------+
rx          |    2.341(R)|   -0.058(R)|clk55MHz          |   0.000|
------------+------------+------------+------------------+--------+

Clock clk to Pad
------------+------------+------------------+--------+
            | clk (edge) |                  |  Clock |
Destination | to PAD     |Internal Clock(s) |  Phase |
------------+------------+------------------+--------+
alarm       |    4.646(R)|clk55MHz          |   0.000|
tx          |    4.646(R)|clk55MHz          |   0.000|
------------+------------+------------------+--------+

Clock to Setup on destination clock clk
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clk            |   11.088|         |         |         |
---------------+---------+---------+---------+---------+

Analysis completed Thu Apr 14 14:51:33 2005
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Peak Memory Usage: 83 MB