| Property | Value |
| Project Name: | c:\xup\markets\plds\workshops\courses\v71_fpga_flow\labs\work\vhdl\picoblaze_clock |
| Target Device: | xc3s200 |
| Report Generated: | Wednesday 04/13/05 at 16:31 |
| Printable Summary (View as HTML) | embedded_kcpsm3_summary.html |
| Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slices: | 132 | 1920 | 6% | |
| Number of Slice Flip Flops: | 76 | 3840 | 1% | |
| Number of 4 input LUTs: | 171 | 3840 | 4% | |
| Number of bonded IOBs: | 30 | 173 | 17% | |
| Number of GCLKs: | 1 | 8 | 12% |
| Property | Value |
| Data Not Yet Available |
| Constraint(s) | Requested | Actual | Logic Levels |
| Data Not Yet Available |
| Report Name | Status | Last Date Modified |
| Synthesis Report | Current | Wednesday 04/13/05 at 16:31 |