C:/XUP/Markets/PLDs/Workshops/courses/v71_fpga_flow/labs/work/Assembler/INT_TEST.VHD
L:/H.39/rtf/vhdl/src/unisims/unisim_VITAL.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v71_fpga_flow/labs/work/VHDL/kcpsm3.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v71_fpga_flow/labs/work/VHDL/kcpsm3_int_test.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v71_fpga_flow/labs/work/VHDL/test_bench.vhd